Abstract
Various methods have been discussed in the literature regarding enabling the over-current (OC) capability of silicon carbide (SiC) MOSFETs. SiC MOSFETs can operate at up to 250 °C without failure. One of their features is to permit transient operation at elevated temperatures. This is possible if the stress on the gate oxide and packaging can be kept to a level that can be handled. This paper, instead, investigates the potential of enabling the OC capability of SiC MOSFETs by modifying the gate-source voltage. Since the on-state resistance ((Formula presented.)) of SiC MOSFETs decreases with an increase in the gate voltage ((Formula presented.)), the conduction losses can be decreased by increasing the (Formula presented.). Experiments and simulations have been performed to predict the (Formula presented.) with the increase in (Formula presented.). It is found that the simulation models provided by manufacturers can be used to predict (Formula presented.) accurately even outside the specifications, hence facilitating the precise estimation of conduction losses. It is also concluded that (Formula presented.) can be increased during OCs in order to keep the conduction losses within the safety limits. A simple concept for implementing this function on a gate driver is also proposed with the additional functionality of increasing the (Formula presented.) during OC by measuring the on-state voltage of the MOSFET.
Original language | English |
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Article number | 4319 |
Journal | Energies |
Volume | 17 |
Issue number | 17 |
ISSN | 1996-1073 |
DOIs | |
Publication status | Published - Sept 2024 |
Bibliographical note
Publisher Copyright:© 2024 by the authors.
Keywords
- conduction losses
- gate driver
- gate oxide
- HVDC
- on-state resistance
- over-current