Design and Implementation of Seventeen Level Inverter With Reduced Components

Dhanamjayulu Chittathuru, Devalraju Prasad, Padmanaban Sanjeevikumar, Pandav Kiran Maroti, Jens Bo Holm-Nielsen, Frede Blaabjerg

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The multilevel inverters (MLI) are resourceful in producing a voltage waveform with superior-quality staircase counterfeit sinusoidal and depressed harmonic distortion (THD). Several conventional topologies are proposed to realize the MLI however, the limitations of these topologies may involve more DC sources and power-switching devices, and less THD, which in turn, increases the cost and size of the inverter. These drawbacks can be eliminated with the proposed hybrid Cascaded H-Bridge Multilevel Inverter with reduced components topology. As compared with the established MLI topologies the recommended topology having a reduced number of DC sources, power-switching devices, component count level factor, lesser TSV, more efficient, lesser THD, and cost-effective. The proposed MLI is a blend of a single-phase T-Type inverter and an H-Bridge module made of sub switches. This article incorporates the design and simulation of the multilevel inverter with staircase PWM technique. Further, the 9-level and 17-level MLI is examined with different combinational loads. The proposed inverter is stable during nonlinear loads, and it is well suited for FACTS and renewable energy grid-connected applications. An operational guideline has been explained with correct figures and tables. The Output voltage wave is realized in numerical simulation. Finally, the experimental demonstrations were performed by implementing a hardware prototype setup for both linear and nonlinear loads using the dSPACE controller laboratory.
Original languageEnglish
Article number9334980
JournalIEEE Access
Pages (from-to)16746-16760
Number of pages15
Publication statusPublished - Jan 2021


  • Hybrid cascaded H-bridge multilevel inverter with reduced components
  • pulse width modulation (PWM)
  • total harmonics distortion (THD)


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