Abstract
In traditional three-level neutral-point-clamped (NPC) inverters, a major issue is capacitor voltage imbalance, which results in low order harmonics. The compensation of the capacitor voltages often require additional control complexity, which cannot be conveniently implemented. The "alternative phase opposition disposition" (APOD) modulation method used in traditional NPC topologies also has lower harmonics performance as compared to the "phase disposition" (PD) modulation method.In this paper, we introduce a new three-level NPC topology that utilises the harmonically superior PD modulation method, with the ability to easily adjust for capacitor voltage imbalances. To further improve the boost capability of the three-level NPC inverters, another new topology introduces 2 additional diodes,achieving higher boost performance while totally eliminating thepossibility of capacitor voltage mismatch.
| Original language | English |
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| Title of host publication | Proceedings of the 24th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2009 |
| Publisher | IEEE |
| Publication date | 2009 |
| Pages | 689-695 |
| ISBN (Print) | 978-1-4244-2811-3 |
| ISBN (Electronic) | 978-1-4244-2812-0 |
| DOIs | |
| Publication status | Published - 2009 |
| Event | Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2009 - Washington, United States Duration: 15 Feb 2009 → 19 Feb 2009 Conference number: 24 |
Conference
| Conference | Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2009 |
|---|---|
| Number | 24 |
| Country/Territory | United States |
| City | Washington |
| Period | 15/02/2009 → 19/02/2009 |