Failure analysis of a degraded 1.2 kV SiC MOSFET after short circuit at high temperature

Paula Diaz Reigosa, Francesco Iannuzzo, Lorenzo Ceccarelli

Research output: Contribution to book/anthology/report/conference proceedingArticle in proceedingResearchpeer-review

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Abstract

This paper presents the experimental results obtained from investigating the impact of short-circuit in SiC MOSFETs at high temperatures. The results indicate that a gate degradation mechanism occurs under a single-stress short circuit event at nominal voltage and junction temperature of 150° C. The failure mechanism is the gate breakdown, which can be early detected by monitoring the voltage drop of the gate-voltage waveform. The reduction of the gate voltage indicates that a leakage current flows through the gate, leading to a permanent damage of the device but preserving its voltage blocking capability. This hypothesis has been validated through semiconductor failure analysis by comparing the structure of a fresh and a degraded SiC MOSFET. A Focused Ion Beam cut is performed showing cracks between the poly-silicon gate and aluminium source. Furthermore alterations/particles near the source contact have been found for the degraded device.
Original languageEnglish
Title of host publicationProceedings of the IPFA 2018 - 25th International Symposium on the Physical and Failure Analysis of Integrated Circuits
Number of pages5
Volume2018-July
PublisherIEEE Press
Publication dateJul 2018
Pages1-5
Article number8452575
ISBN (Print)978-1-5386-4930-5
ISBN (Electronic)978-1-5386-4929-9
DOIs
Publication statusPublished - Jul 2018
Event25th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2018 - Singapore, Singapore
Duration: 16 Jul 201819 Jul 2018

Conference

Conference25th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2018
CountrySingapore
CitySingapore
Period16/07/201819/07/2018
SponsorHamamatsu Photonics K.K., Thermo Fisher Scientific
SeriesIEEE International Symposium on Physical & Failure Analysis of Integrated Circuit (IPFA)
ISSN1946-1550

Fingerprint

Short circuit currents
Failure analysis
Electric potential
Temperature
Focused ion beams
Leakage currents
Semiconductor materials
Cracks
Aluminum
Degradation
Silicon
Monitoring

Keywords

  • Logic gates
  • Silicon carbide
  • MOSFET
  • Failure analysis
  • Leakage currents
  • Ion beams
  • Aluminum

Cite this

Reigosa, P. D., Iannuzzo, F., & Ceccarelli, L. (2018). Failure analysis of a degraded 1.2 kV SiC MOSFET after short circuit at high temperature. In Proceedings of the IPFA 2018 - 25th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Vol. 2018-July, pp. 1-5). [8452575] IEEE Press. IEEE International Symposium on Physical & Failure Analysis of Integrated Circuit (IPFA) https://doi.org/10.1109/IPFA.2018.8452575
Reigosa, Paula Diaz ; Iannuzzo, Francesco ; Ceccarelli, Lorenzo. / Failure analysis of a degraded 1.2 kV SiC MOSFET after short circuit at high temperature. Proceedings of the IPFA 2018 - 25th International Symposium on the Physical and Failure Analysis of Integrated Circuits. Vol. 2018-July IEEE Press, 2018. pp. 1-5 (IEEE International Symposium on Physical & Failure Analysis of Integrated Circuit (IPFA)).
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abstract = "This paper presents the experimental results obtained from investigating the impact of short-circuit in SiC MOSFETs at high temperatures. The results indicate that a gate degradation mechanism occurs under a single-stress short circuit event at nominal voltage and junction temperature of 150° C. The failure mechanism is the gate breakdown, which can be early detected by monitoring the voltage drop of the gate-voltage waveform. The reduction of the gate voltage indicates that a leakage current flows through the gate, leading to a permanent damage of the device but preserving its voltage blocking capability. This hypothesis has been validated through semiconductor failure analysis by comparing the structure of a fresh and a degraded SiC MOSFET. A Focused Ion Beam cut is performed showing cracks between the poly-silicon gate and aluminium source. Furthermore alterations/particles near the source contact have been found for the degraded device.",
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Reigosa, PD, Iannuzzo, F & Ceccarelli, L 2018, Failure analysis of a degraded 1.2 kV SiC MOSFET after short circuit at high temperature. in Proceedings of the IPFA 2018 - 25th International Symposium on the Physical and Failure Analysis of Integrated Circuits. vol. 2018-July, 8452575, IEEE Press, IEEE International Symposium on Physical & Failure Analysis of Integrated Circuit (IPFA), pp. 1-5, 25th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2018, Singapore, Singapore, 16/07/2018. https://doi.org/10.1109/IPFA.2018.8452575

Failure analysis of a degraded 1.2 kV SiC MOSFET after short circuit at high temperature. / Reigosa, Paula Diaz; Iannuzzo, Francesco; Ceccarelli, Lorenzo.

Proceedings of the IPFA 2018 - 25th International Symposium on the Physical and Failure Analysis of Integrated Circuits. Vol. 2018-July IEEE Press, 2018. p. 1-5 8452575 (IEEE International Symposium on Physical & Failure Analysis of Integrated Circuit (IPFA)).

Research output: Contribution to book/anthology/report/conference proceedingArticle in proceedingResearchpeer-review

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Reigosa PD, Iannuzzo F, Ceccarelli L. Failure analysis of a degraded 1.2 kV SiC MOSFET after short circuit at high temperature. In Proceedings of the IPFA 2018 - 25th International Symposium on the Physical and Failure Analysis of Integrated Circuits. Vol. 2018-July. IEEE Press. 2018. p. 1-5. 8452575. (IEEE International Symposium on Physical & Failure Analysis of Integrated Circuit (IPFA)). https://doi.org/10.1109/IPFA.2018.8452575