Abstract
Filter inductors are probably one of the heaviest and more voluminous components found in power supplies of most electronic devices. A known technique to reduce the inductor size in dc applications is the use of permanent magnet inductors (PMIs). One of the latest developed biasing topologies, termed the saturation-gap, uses two standard UU cores simultaneously biased by PMs. This paper presents a size reduction design strategy, implemented on a 10-A, 5-mH output filter inductor pair of a dc–dc converter, using the saturation-gap topology. Two different PMI designs are presented. The standard filter and the two versions using PMIs were physically implemented and tested in the power electronics lab. The two different implemented PMIs filters present 50% core volume reduction and 25% and 50% copper volume reduction, respectively. The measurements on the three filters are compared with simulation results using a finite-element analysis with the FEMM software.
Original language | English |
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Journal | I E E E Journal of Emerging and Selected Topics in Power Electronics |
Volume | 4 |
Issue number | 2 |
Pages (from-to) | 382 - 392 |
Number of pages | 11 |
ISSN | 2168-6777 |
DOIs | |
Publication status | Published - Jun 2016 |
Keywords
- Bias
- Inductor
- Permanent magnet (PM)