Impact of device aging in the compact electro-thermal modeling of SiC power MOSFETs

L. Ceccarelli*, A. S. Bahman, F. Iannuzzo

*Corresponding author for this work

Research output: Contribution to journalJournal articleResearchpeer-review

16 Citations (Scopus)

Abstract

This paper provides an insight into the impact of aging-related parameter drift in the operation of a 1.2 kV discrete SiC power MOSFET in a TO-247-4 package. First, the on-state and switching behavior of the pristine component is characterized using a physics-based, temperature-dependent PSpice model, optimized and validated with experimental data under a wide range of operational conditions. The package parasitic elements and lumped thermal network are extracted from finite element simulation of the device geometry. Subsequently, the degradation of several parameters, including threshold voltage and thermal impedance, are introduced in the model, based on the aging data reported in the literature for the same device and packaging technology. Hence, both models, with and without aging, are used to simulate and compare the thermal stress on the component during a mission profile for a traction inverter application. The simulations show a significant impact of the aged parameters on the device electrical and thermal performance for the given mission profile, leading to larger thermal stress at a chip and package level.
Original languageEnglish
Article number113336
JournalMicroelectronics Reliability
Volume100-101
ISSN0026-2714
DOIs
Publication statusPublished - Sept 2019

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