Junction Temperature Aware Energy Efficient Router Design on FPGA

Vandana Thind, Shivani Sharma, M H Minwer, Dil muhammed Akbar Hussain

Research output: Contribution to journalJournal articleResearchpeer-review

Abstract

Energy, Power and efficiency are very much related to each other. To make any system efficient, Power consumed by it must be minimized or we can say that power dissipation should be less. In our research we tried to make a energy efficient router design on FPGA by varying junction temperature. By varying junction temperature the value of leakage is observed and its effect on total power dissipated is also obtained. This research is made by keeping output load at value 50.The result is also obtained at different frequencies i.e. at 10MHz, 0.1GHz and 1GHz. Different values of output power at observed and reduction the power is calculated accordingly. So this project gives an overview to make the router efficient by varying junction temperature.
Original languageEnglish
JournalGyancity Journal of Engineering and Technology
Volume1
Issue number1
Pages (from-to)48 - 55
Number of pages8
ISSN2456-0065
DOIs
Publication statusPublished - Jan 2015

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Routers
Field programmable gate arrays (FPGA)
Temperature
Energy dissipation

Keywords

  • FPGA, Power, Router, Junction Temperature, Energy Efficiency

Cite this

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title = "Junction Temperature Aware Energy Efficient Router Design on FPGA",
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Junction Temperature Aware Energy Efficient Router Design on FPGA. / Thind, Vandana; Sharma, Shivani; Minwer, M H; Hussain, Dil muhammed Akbar.

In: Gyancity Journal of Engineering and Technology, Vol. 1, No. 1, 01.2015, p. 48 - 55.

Research output: Contribution to journalJournal articleResearchpeer-review

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AU - Thind, Vandana

AU - Sharma, Shivani

AU - Minwer, M H

AU - Hussain, Dil muhammed Akbar

PY - 2015/1

Y1 - 2015/1

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AB - Energy, Power and efficiency are very much related to each other. To make any system efficient, Power consumed by it must be minimized or we can say that power dissipation should be less. In our research we tried to make a energy efficient router design on FPGA by varying junction temperature. By varying junction temperature the value of leakage is observed and its effect on total power dissipated is also obtained. This research is made by keeping output load at value 50.The result is also obtained at different frequencies i.e. at 10MHz, 0.1GHz and 1GHz. Different values of output power at observed and reduction the power is calculated accordingly. So this project gives an overview to make the router efficient by varying junction temperature.

KW - FPGA, Power, Router, Junction Temperature, Energy Efficiency

U2 - 10.21058/gjet.2015.1106

DO - 10.21058/gjet.2015.1106

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