Multi-chip medium voltage SiC MOSFET power module with focus on low parasitic capacitance

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Abstract

Advances in high breakdown voltage SiC MOSFETs is enabling the use of simpler topologies, such as a half-bridge in medium voltage applications. In order to increase the power output it is necessary to parallel multiple MOSFETs, which can be done in power modules. At high voltage operating conditions parasitic capacitances of the power module become increasingly important to consider, due to increased switching losses and increased risk to cause EMI. A 10 kV, 80 A half-bridge design is presented using four MOSFETs in parallel, with a design focus on minimal parasitic capacitances.

Original languageEnglish
Title of host publicationCIPS 2020 - 11th International Conference on Integrated Power Electronics Systems
Number of pages6
PublisherVDE Verlag GMBH
Publication date2020
Pages154-159
ISBN (Electronic)9783800752263
Publication statusPublished - 2020
Event11th International Conference on Integrated Power Electronics Systems, CIPS 2020 - Berlin, Germany
Duration: 24 Mar 202026 Mar 2020

Conference

Conference11th International Conference on Integrated Power Electronics Systems, CIPS 2020
Country/TerritoryGermany
CityBerlin
Period24/03/202026/03/2020

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