Abstract
Mixed-criticality systems, where multiple systems with varying criticality-levels share a single hardware platform, require isolation between tasks with different criticality-levels. Isolation can be achieved with software-based solutions or can be enforced by a hardware level partitioning. An asymmetric multiprocessor architecture offers hardware-based isolation at the cost of underutilized hardware resources, and the inter-core communication mechanism is often a single point of failure in such architectures. In contrast, a partitioned uniprocessor offers efficient resource utilization at the cost of limited scalability. We propose a partitioned real-time asymmetric architecture (PaRTAA) specifically designed for mixed-criticality airborne systems, featuring robust partitioning within processing elements for establishing isolation between tasks with varying criticality. The granularity in the processing element offers efficient resource utilization where inter-dependent tasks share the same processing element for sequential execution while preserving isolation, and independent tasks simultaneously execute on different processing elements as per system requirements.
Original language | English |
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Article number | 9118979 |
Journal | IEEE Transactions on Computers |
Volume | 69 |
Issue number | 8 |
Pages (from-to) | 1221-1232 |
Number of pages | 12 |
ISSN | 0018-9340 |
DOIs | |
Publication status | Published - 2020 |
Keywords
- Single Core Equivalence
- Processor Architecture
- Avionics on Multi-core
- Mixed-criticality Systems
- Integrated Modular Avionics
- Robust Resource Partitioning