Process, Voltage and Temperature Compensation Technique for Cascode Modulated PAs

Daniel Sira, Torben Larsen

Research output: Contribution to journalJournal articleResearchpeer-review

4 Citations (Scopus)

Abstract

This paper presents a process, voltage and temperature (PVT) compensation method for a cascode modulated polar power amplifier (PA). It is shown that it is possible to create a baseband replica circuit of the PA that has the same AM-AM nonlinearity as the PA itself. The replica circuit, that represents a transistor level model (empirical model) of the cascode modulated PA, is utilized in a PA analog predistorter. The analog predistorter linearizes and compensates for PVT variation of the cascode modulated PA. The empirical model is placed in the negative feedback of an operational transconductance amplifier. The predistorted varying envelope signal is applied to the cascode gate of the PA. It is shown that the proposed PVT compensation technique significantly reduces the PVT spread of the PA linearity indicators and improves the PA linearity. Simulations were performed in a 0.13 μm CMOS process.
Original languageEnglish
JournalI E E E Transactions on Circuits and Systems Part 1: Regular Papers
Volume60
Issue number9
Pages (from-to)2511-2520
Number of pages10
ISSN1549-8328
DOIs
Publication statusPublished - Sep 2013

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Power amplifiers
Electric potential
Temperature
Compensation and Redress
Networks (circuits)
Operational amplifiers
Transistors
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title = "Process, Voltage and Temperature Compensation Technique for Cascode Modulated PAs",
abstract = "This paper presents a process, voltage and temperature (PVT) compensation method for a cascode modulated polar power amplifier (PA). It is shown that it is possible to create a baseband replica circuit of the PA that has the same AM-AM nonlinearity as the PA itself. The replica circuit, that represents a transistor level model (empirical model) of the cascode modulated PA, is utilized in a PA analog predistorter. The analog predistorter linearizes and compensates for PVT variation of the cascode modulated PA. The empirical model is placed in the negative feedback of an operational transconductance amplifier. The predistorted varying envelope signal is applied to the cascode gate of the PA. It is shown that the proposed PVT compensation technique significantly reduces the PVT spread of the PA linearity indicators and improves the PA linearity. Simulations were performed in a 0.13 μm CMOS process.",
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Process, Voltage and Temperature Compensation Technique for Cascode Modulated PAs. / Sira, Daniel; Larsen, Torben.

In: I E E E Transactions on Circuits and Systems Part 1: Regular Papers, Vol. 60, No. 9, 09.2013, p. 2511-2520.

Research output: Contribution to journalJournal articleResearchpeer-review

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T1 - Process, Voltage and Temperature Compensation Technique for Cascode Modulated PAs

AU - Sira, Daniel

AU - Larsen, Torben

PY - 2013/9

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N2 - This paper presents a process, voltage and temperature (PVT) compensation method for a cascode modulated polar power amplifier (PA). It is shown that it is possible to create a baseband replica circuit of the PA that has the same AM-AM nonlinearity as the PA itself. The replica circuit, that represents a transistor level model (empirical model) of the cascode modulated PA, is utilized in a PA analog predistorter. The analog predistorter linearizes and compensates for PVT variation of the cascode modulated PA. The empirical model is placed in the negative feedback of an operational transconductance amplifier. The predistorted varying envelope signal is applied to the cascode gate of the PA. It is shown that the proposed PVT compensation technique significantly reduces the PVT spread of the PA linearity indicators and improves the PA linearity. Simulations were performed in a 0.13 μm CMOS process.

AB - This paper presents a process, voltage and temperature (PVT) compensation method for a cascode modulated polar power amplifier (PA). It is shown that it is possible to create a baseband replica circuit of the PA that has the same AM-AM nonlinearity as the PA itself. The replica circuit, that represents a transistor level model (empirical model) of the cascode modulated PA, is utilized in a PA analog predistorter. The analog predistorter linearizes and compensates for PVT variation of the cascode modulated PA. The empirical model is placed in the negative feedback of an operational transconductance amplifier. The predistorted varying envelope signal is applied to the cascode gate of the PA. It is shown that the proposed PVT compensation technique significantly reduces the PVT spread of the PA linearity indicators and improves the PA linearity. Simulations were performed in a 0.13 μm CMOS process.

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