Space-Vector PWM with Common-Mode Voltage Elimination for Multiphase Drives

Oscar Lopez, Jacobo Alvarez, Jano Malvar, Alejandro G. Yepes, Ana Vidal, Fernando Baneira, Diego Perez-Estevez, Francisco Daniel Freijedo Fernandez, Jesus Doval-Gandoy

Research output: Contribution to journalJournal articleResearchpeer-review

60 Citations (Scopus)

Abstract

Switching common-mode voltage (CMV) generated by the pulse width modulation (PWM) of the inverter causes common-mode currents, which lead to motor bearing failures and electromagnetic interference problems in multiphase drives. Such switching CMV can be reduced by taking advantage of the switching states of multilevel multiphase inverters that produce zero CMV. Specific space-vector PWM (SVPWM) techniques with CMV elimination, which only use zero CMV states, have been proposed for three-level five-phase drives, and for open-end winding five-, six-, and seven-phase drives, but such methods cannot be extended to a higher number of levels or phases. This paper presents a general (for any number of levels and phases) SVPMW with CMV elimination. The proposed technique can be applied to most multilevel topologies, has low computational complexity and is suitable for low-cost hardware implementations. The new algorithm is implemented in a low-cost field-programmable gate array and it is successfully tested in the laboratory using a five-level five-phase motor drive.

Original languageEnglish
Article number7390099
JournalIEEE Transactions on Power Electronics
Volume31
Issue number12
Pages (from-to)8151-8161
Number of pages11
ISSN0885-8993
DOIs
Publication statusPublished - Dec 2016

Keywords

  • Common-mode voltage elimination
  • Field-programmable gate array (FPGA)
  • Multiphase drive
  • Space-vector pulse width modulation (PWM)
  • Voltage source inverter (VSI)

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