Stability Analysis and Controller Synthesis for Digital Single-Loop Voltage-Controlled Inverters

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4 Citations (Scopus)

Abstract

This paper analyzes first the stability of single-loop digital voltage control scheme for the LC-filtered voltage source inverters. It turns out that the phase lag, caused by the time delay of digital control system and by the use of integral controller, can stabilize the voltage loop without damping of LC-filter resonance. The stability regions are then identified with alternative voltage controller synthesized. For further widening the stability region, an active damping approach is proposed and co-designed with the voltage controller in the discrete z-domain. Simulations and experimental results of both 50-Hz and 400-Hz systems validate the theoretical analyses and the performance of the approach.
Original languageEnglish
Title of host publicationProceedings of the 31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
Number of pages8
PublisherIEEE
Publication dateMar 2016
Pages2011-2018
ISBN (Print)978-1-4673-8393-6 , 978-1-4673-9551-9
ISBN (Electronic)978-1-4673-9550-2
DOIs
Publication statusPublished - Mar 2016
Event2016 IEEE Applied Power Electronics Conference and Exposition (APEC) - Long Beach Convention and Entertainment Center, Long Beach, United States
Duration: 20 Mar 201624 Mar 2016
http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=32616

Conference

Conference2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
LocationLong Beach Convention and Entertainment Center
Country/TerritoryUnited States
CityLong Beach
Period20/03/201624/03/2016
Internet address

Keywords

  • Time delay
  • Stability
  • Voltage-controlled inverters
  • LC-filter resonance

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