Study of Current Density Influence on Bond Wire Degradation Rate in SiC MOSFET Modules

H. Luo, F. Iannuzzo, N. Baker, F. Blaabjerg, Wuhua Li, Xiangning He

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Abstract

This paper proposes a separated test method for studying the current effect on the ageing process of a wire-bonded silicon carbide (SiC) MOSFET module under power cycling test (PCT). The separated test method enables testing SiC MOSFET at different load current densities, but under the same temperature swing and average temperature conditions. By analyzing the output characteristics in the linear region, the relationships among the gate voltage, on-state voltage, and junction temperature are revealed. Then, the one-To-one correspondence between gate voltage and conduction power loss can be used to adjust the current density under the same temperature conditions. Two six-pack SiC modules (1200 V/20 A) are tested under 12 and 24 A conditions to experimentally verify the proposed method. The ageing curves show that the high current can speed up the ageing rate of bond wires even under the same temperature conditions (65 °C-125 °C). Moreover, the high current density also has an impact on solder layer degradation as well as on the temperature conditions. Finally, a power device analyzer B1506A and a scanning acoustic microscope (SAM) are used to investigate the degradation of electrical parameters and the solder layer, respectively. The final summary of analytical results shows that the input current has a nonnegligible impact on the degradation process of power modules.
Original languageEnglish
Article number8730380
JournalIEEE Journal of Emerging and Selected Topics in Power Electronics
Volume8
Issue number2
Pages (from-to)1622-1632
Number of pages11
ISSN2168-6777
DOIs
Publication statusPublished - Jun 2020

Keywords

  • Adjustable gate voltage
  • package degradation
  • power cycling test (PCT)
  • separated test
  • silicon carbide (SiC) MOSFET

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