T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver

Emilio Jose Martinez Perez; Feridoon Jalili; Ming Shen; Jan H. Mikkelsen; Ole Kiel Jensen; Gert Frølund Pedersen

doi:10.1109/NORCHIP.2019.8906983

T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver

Emilio Jose Martinez Perez^*, Feridoon Jalili, Ming Shen, Jan H. Mikkelsen, Ole Kiel Jensen, Gert Frølund Pedersen

^*Corresponding author for this work

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

3 Citations (Scopus)

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Abstract

With the recent popularization of nanosatellite technologies, the industry is putting a notable effort into increasing the performance of the systems integrated in these small spacecrafts. In this paper, a novel outphasing ampliﬁcation architecture to enhance the power efﬁciency of a satellite downlink is presented and evaluated. Based on a conventional LINC (LInear ampliﬁcation with Nonlinear Components) architecture, the proposed architecture transmits both outphased signals, and carry out the signal combination in the receiver in the base-band domain. The resulted architecture takes advantage of an efﬁcient signal ampliﬁcation given by the nonlinear power ampliﬁers, while the elimination of the signal power combiner from the transmitter, increases the overall power efﬁciency. We outline and analyze those elements that restrict the performance of this novel approach. The simulations and laboratory experimentation probes the proposed architecture is feasible, and able to improve a ?? % the power efﬁciency, compared to a classic transmitter front-end architecture.

Original language	English
Title of host publication	2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) : NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings
Editors	Jari Nurmi, Peeter Ellervee, Kari Halonen, Juha Roning
Number of pages	5
Publisher	IEEE
Publication date	Oct 2019
Pages	1-5
Article number	8906983
ISBN (Print)	978-1-7281-2770-5
ISBN (Electronic)	978-1-7281-2769-9
DOIs	https://doi.org/10.1109/NORCHIP.2019.8906983
Publication status	Published - Oct 2019
Event	2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) - Helsinki, Finland Duration: 29 Oct 2019 → 30 Oct 2019

Conference

Conference	2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
Country/Territory	Finland
City	Helsinki
Period	29/10/2019 → 30/10/2019

Keywords

Digital combination
Transmitted LINC (T-LINC)
digital mismatch correction
linear amplification with nonlinear components (LINC)
outphasing amplification

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10.1109/NORCHIP.2019.8906983

T_LINC_architecture_with_digital_combination_and_mismatch_correction_in_the_receiver_251019Accepted author manuscript, 394 KB

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Perez, E. J. M., Jalili, F., Shen, M., Mikkelsen, J. H., Jensen, O. K., & Pedersen, G. F. (2019). T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver. In J. Nurmi, P. Ellervee, K. Halonen, & J. Roning (Eds.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC): NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings (pp. 1-5). Article 8906983 IEEE. https://doi.org/10.1109/NORCHIP.2019.8906983

Perez, Emilio Jose Martinez ; Jalili, Feridoon ; Shen, Ming et al. / T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver. 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC): NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings. editor / Jari Nurmi ; Peeter Ellervee ; Kari Halonen ; Juha Roning. IEEE, 2019. pp. 1-5

@inproceedings{ea8d05548b1e40ba9440340c04232d1d,

title = "T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver",

abstract = "With the recent popularization of nanosatellite technologies, the industry is putting a notable effort into increasing the performance of the systems integrated in these small spacecrafts. In this paper, a novel outphasing ampliﬁcation architecture to enhance the power efﬁciency of a satellite downlink is presented and evaluated. Based on a conventional LINC (LInear ampliﬁcation with Nonlinear Components) architecture, the proposed architecture transmits both outphased signals, and carry out the signal combination in the receiver in the base-band domain. The resulted architecture takes advantage of an efﬁcient signal ampliﬁcation given by the nonlinear power ampliﬁers, while the elimination of the signal power combiner from the transmitter, increases the overall power efﬁciency. We outline and analyze those elements that restrict the performance of this novel approach. The simulations and laboratory experimentation probes the proposed architecture is feasible, and able to improve a ?? % the power efﬁciency, compared to a classic transmitter front-end architecture.",

keywords = "Digital combination, Transmitted LINC (T-LINC), digital mismatch correction, linear amplification with nonlinear components (LINC), outphasing amplification",

author = "Perez, {Emilio Jose Martinez} and Feridoon Jalili and Ming Shen and Mikkelsen, {Jan H.} and Jensen, {Ole Kiel} and Pedersen, {Gert Fr{\o}lund}",

year = "2019",

month = oct,

doi = "10.1109/NORCHIP.2019.8906983",

language = "English",

isbn = "978-1-7281-2770-5",

pages = "1--5",

editor = "Jari Nurmi and Peeter Ellervee and Kari Halonen and Juha Roning",

booktitle = "2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)",

publisher = "IEEE",

address = "United States",

note = "2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) ; Conference date: 29-10-2019 Through 30-10-2019",

}

Perez, EJM, Jalili, F, Shen, M , Mikkelsen, JH , Jensen, OK & Pedersen, GF 2019, T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver. in J Nurmi, P Ellervee, K Halonen & J Roning (eds), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC): NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings., 8906983, IEEE, pp. 1-5, 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), Helsinki, Finland, 29/10/2019. https://doi.org/10.1109/NORCHIP.2019.8906983

T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver. / Perez, Emilio Jose Martinez; Jalili, Feridoon; Shen, Ming et al.
2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC): NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings. ed. / Jari Nurmi; Peeter Ellervee; Kari Halonen; Juha Roning. IEEE, 2019. p. 1-5 8906983.

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

TY - GEN

T1 - T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver

AU - Perez, Emilio Jose Martinez

AU - Jalili, Feridoon

AU - Shen, Ming

AU - Mikkelsen, Jan H.

AU - Jensen, Ole Kiel

AU - Pedersen, Gert Frølund

PY - 2019/10

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N2 - With the recent popularization of nanosatellite technologies, the industry is putting a notable effort into increasing the performance of the systems integrated in these small spacecrafts. In this paper, a novel outphasing ampliﬁcation architecture to enhance the power efﬁciency of a satellite downlink is presented and evaluated. Based on a conventional LINC (LInear ampliﬁcation with Nonlinear Components) architecture, the proposed architecture transmits both outphased signals, and carry out the signal combination in the receiver in the base-band domain. The resulted architecture takes advantage of an efﬁcient signal ampliﬁcation given by the nonlinear power ampliﬁers, while the elimination of the signal power combiner from the transmitter, increases the overall power efﬁciency. We outline and analyze those elements that restrict the performance of this novel approach. The simulations and laboratory experimentation probes the proposed architecture is feasible, and able to improve a ?? % the power efﬁciency, compared to a classic transmitter front-end architecture.

AB - With the recent popularization of nanosatellite technologies, the industry is putting a notable effort into increasing the performance of the systems integrated in these small spacecrafts. In this paper, a novel outphasing ampliﬁcation architecture to enhance the power efﬁciency of a satellite downlink is presented and evaluated. Based on a conventional LINC (LInear ampliﬁcation with Nonlinear Components) architecture, the proposed architecture transmits both outphased signals, and carry out the signal combination in the receiver in the base-band domain. The resulted architecture takes advantage of an efﬁcient signal ampliﬁcation given by the nonlinear power ampliﬁers, while the elimination of the signal power combiner from the transmitter, increases the overall power efﬁciency. We outline and analyze those elements that restrict the performance of this novel approach. The simulations and laboratory experimentation probes the proposed architecture is feasible, and able to improve a ?? % the power efﬁciency, compared to a classic transmitter front-end architecture.

KW - Digital combination

KW - Transmitted LINC (T-LINC)

KW - digital mismatch correction

KW - linear amplification with nonlinear components (LINC)

KW - outphasing amplification

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U2 - 10.1109/NORCHIP.2019.8906983

DO - 10.1109/NORCHIP.2019.8906983

M3 - Article in proceeding

SN - 978-1-7281-2770-5

SP - 1

EP - 5

BT - 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

A2 - Nurmi, Jari

A2 - Ellervee, Peeter

A2 - Halonen, Kari

A2 - Roning, Juha

PB - IEEE

T2 - 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

Y2 - 29 October 2019 through 30 October 2019

ER -

Perez EJM, Jalili F, Shen M , Mikkelsen JH , Jensen OK , Pedersen GF. T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver. In Nurmi J, Ellervee P, Halonen K, Roning J, editors, 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC): NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings. IEEE. 2019. p. 1-5. 8906983 doi: 10.1109/NORCHIP.2019.8906983

T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver

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