Temporal Partitioning and Multi-Processor Scheduling for Reconfigurable Architectures

Andreas Popp, Yannick Le Moullec, Peter Koch

Research output: Contribution to conference without publisher/journalPosterResearch

Abstract

This poster presentation outlines a proposed framework for handling mapping of signal processing
applications to heterogeneous reconfigurable architectures. The methodology consists of an
extension to traditional multi-processor scheduling by creating a separate HW track for generation
of groups of tasks that are handled similarly to SW processes in a traditional multi-processor
scheduling context.
Original languageEnglish
Publication date2008
Publication statusPublished - 2008
EventHiPEAC Advanced Computer Architectures and Compilation for Embedded Systems Summer School - L'Aquila, Italy
Duration: 13 Jul 200819 Jul 2008
Conference number: 4

Conference

ConferenceHiPEAC Advanced Computer Architectures and Compilation for Embedded Systems Summer School
Number4
CountryItaly
CityL'Aquila
Period13/07/200819/07/2008

Keywords

  • Reconfigurable Computing
  • Heterogeneous Architectures
  • Temporal Partitioning
  • Binding
  • Scheduling

Fingerprint Dive into the research topics of 'Temporal Partitioning and Multi-Processor Scheduling for Reconfigurable Architectures'. Together they form a unique fingerprint.

  • Cite this

    Popp, A., Le Moullec, Y., & Koch, P. (2008). Temporal Partitioning and Multi-Processor Scheduling for Reconfigurable Architectures. Poster presented at HiPEAC Advanced Computer Architectures and Compilation for Embedded Systems Summer School, L'Aquila, Italy.