Voltage unbalance compensation by a grid connected inverter using virtual impedance and admittance control loops

Seyyed Yousef Mousazadeh Mousavi; Alireza Jalilian; Mehdi Savaghebi

doi:10.1109/PEDSTC.2018.8343792

Voltage unbalance compensation by a grid connected inverter using virtual impedance and admittance control loops

Seyyed Yousef Mousazadeh Mousavi^*, Alireza Jalilian, Mehdi Savaghebi

^*Corresponding author for this work

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

7 Citations (Scopus)

Abstract

In this paper, voltage unbalance compensation using DG interfacing inverter is proposed. By using this control method, the DG not only can inject generated power to the grid, but also can compensate the unbalance voltage of the Point of Common Coupling (PCC). A compensation scheme based on negative sequence virtual impedance or admittance is proposed. The control method is designed in stationary reference frame and is based on Proportional-Resonance (PR) controller. The compensation is achieved by using only local measurement. The simulation results in Matlab/Simulink verify the effectiveness of the proposed control method.

Original language	English
Title of host publication	9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018
Number of pages	6
Publisher	IEEE
Publication date	19 Apr 2018
Pages	174-179
ISBN (Electronic)	978-1-5386-4699-1
DOIs	https://doi.org/10.1109/PEDSTC.2018.8343792
Publication status	Published - 19 Apr 2018
Event	9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018 - Tehran, Iran, Islamic Republic of Duration: 13 Feb 2018 → 15 Feb 2018

Conference

Conference	9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018
Country/Territory	Iran, Islamic Republic of
City	Tehran
Period	13/02/2018 → 15/02/2018

Keywords

Distributed generating (DG)
Power quality compensation
Virtual admittance
Virtual impedance
Voltage unbalance

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10.1109/PEDSTC.2018.8343792

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title = "Voltage unbalance compensation by a grid connected inverter using virtual impedance and admittance control loops",

abstract = "In this paper, voltage unbalance compensation using DG interfacing inverter is proposed. By using this control method, the DG not only can inject generated power to the grid, but also can compensate the unbalance voltage of the Point of Common Coupling (PCC). A compensation scheme based on negative sequence virtual impedance or admittance is proposed. The control method is designed in stationary reference frame and is based on Proportional-Resonance (PR) controller. The compensation is achieved by using only local measurement. The simulation results in Matlab/Simulink verify the effectiveness of the proposed control method.",

keywords = "Distributed generating (DG), Power quality compensation, Virtual admittance, Virtual impedance, Voltage unbalance",

author = "{Mousazadeh Mousavi}, {Seyyed Yousef} and Alireza Jalilian and Mehdi Savaghebi",

year = "2018",

month = apr,

day = "19",

doi = "10.1109/PEDSTC.2018.8343792",

language = "English",

pages = "174--179",

booktitle = "9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018",

publisher = "IEEE",

address = "United States",

note = "9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018 ; Conference date: 13-02-2018 Through 15-02-2018",

}

Mousazadeh Mousavi, SY, Jalilian, A & Savaghebi, M 2018, Voltage unbalance compensation by a grid connected inverter using virtual impedance and admittance control loops. in 9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018. IEEE, pp. 174-179, 9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018, Tehran, Iran, Islamic Republic of, 13/02/2018. https://doi.org/10.1109/PEDSTC.2018.8343792

Voltage unbalance compensation by a grid connected inverter using virtual impedance and admittance control loops. / Mousazadeh Mousavi, Seyyed Yousef; Jalilian, Alireza; Savaghebi, Mehdi.
9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018. IEEE, 2018. p. 174-179.

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

TY - GEN

T1 - Voltage unbalance compensation by a grid connected inverter using virtual impedance and admittance control loops

AU - Mousazadeh Mousavi, Seyyed Yousef

AU - Jalilian, Alireza

AU - Savaghebi, Mehdi

PY - 2018/4/19

Y1 - 2018/4/19

N2 - In this paper, voltage unbalance compensation using DG interfacing inverter is proposed. By using this control method, the DG not only can inject generated power to the grid, but also can compensate the unbalance voltage of the Point of Common Coupling (PCC). A compensation scheme based on negative sequence virtual impedance or admittance is proposed. The control method is designed in stationary reference frame and is based on Proportional-Resonance (PR) controller. The compensation is achieved by using only local measurement. The simulation results in Matlab/Simulink verify the effectiveness of the proposed control method.

AB - In this paper, voltage unbalance compensation using DG interfacing inverter is proposed. By using this control method, the DG not only can inject generated power to the grid, but also can compensate the unbalance voltage of the Point of Common Coupling (PCC). A compensation scheme based on negative sequence virtual impedance or admittance is proposed. The control method is designed in stationary reference frame and is based on Proportional-Resonance (PR) controller. The compensation is achieved by using only local measurement. The simulation results in Matlab/Simulink verify the effectiveness of the proposed control method.

KW - Distributed generating (DG)

KW - Power quality compensation

KW - Virtual admittance

KW - Virtual impedance

KW - Voltage unbalance

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DO - 10.1109/PEDSTC.2018.8343792

M3 - Article in proceeding

AN - SCOPUS:85050357639

SP - 174

EP - 179

BT - 9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018

PB - IEEE

T2 - 9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018

Y2 - 13 February 2018 through 15 February 2018

ER -

Voltage unbalance compensation by a grid connected inverter using virtual impedance and admittance control loops

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Keywords

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