Admittance-Based Stability Analysis of Resistance-Emulating Controlled Grid-Connected Voltage Source Rectifiers

Due to low cost and high reliability, resistance-emulating control (REC) is an emerging approach for grid-connected voltage source rectifiers (VSRs). However, small-signal stability issues of the grid-connected VSR with REC are currently rarely studied. In this article, the small-signal dq-admittance model of the grid-connected VSR with REC is first built and the small-signal stability superiority of the VSR with REC in weak-grid connection is revealed. First, a dq-admittance model of the grid-connected VSR with REC is established. The admittance characteristics of the grid-connected VSR with REC and the grid-connected VSR with traditional dual closed-loop control (DCC) are analyzed and compared. Then, the influence of short circuit ratio (SCR), voltage-loop bandwidth, and the output power on the stability of the VSR with REC and DCC is analyzed based on the generalized Nyquist criterion. The stability comparison results indicate that the VSR with REC has better adaptability to the weak grid and can achieve a higher bandwidth at the voltage loop. Besides, it is found that the DCC controlled VSR is more suitable for light-load operation than the REC controlled VSR. Finally, the correctness of the analysis is verified by experiments.

interface for power conversion systems, which can provide constant dc-link voltage and achieve sinusoidal input currents [1], [2], [3]. However, various stability issues are introduced by the interactive dynamics between VSRs and the power grids, particularly when the short circuit ratio (SCR) is relatively small [4], [5], [6], [7]. Such stability issues need to be carefully evaluated when considering the entire stable operation of power systems.
The dual closed-loop control (DCC), which owns fast dynamic response and flexible power regulation, has become one of the most dominated control methods for grid-connected VSRs [8], [9], [10]. The DCC usually requires a phase-lockedloop (PLL) to achieve the grid synchronization [11]. The priorart research indicated that the PLL has a significant influence on system stability, especially in a weak grid [12], [13], [14]. According to the impedance-based stability analysis, a negative resistor effect near the fundamental frequency was identified, which tends to cause small-signal instability under weak grid conditions [15], [16].
To address those stability issues led by the PLL, some research efforts have been made [17], [18], [19], [20], [21]. One solution is to modify the control scheme. In [17], a prefilter was added in the critical loop that improves the phase margin of the system. To introduce an additional damping feedback path, a feedforward compensator is proposed in [18]. Furthermore, using advanced PLLs is another good solution. Based on the adaptive filtering technique, a fast and robust PLL algorithm is presented in [19]. A more-stable enhanced PLL (MsEPLL) is developed in [20], which improves stability by adding additional nonlinear damping terms. A linear active disturbance rejection controller (LADRC)-based PLL is proposed in [21], enhancing the system damping under weak grid conditions. Although the abovementioned solutions can improve the stability under adverse grid conditions, they all compromise on the design complexity and computation burden.
Some research works have thus been devoted to the PLL-less control to avoid the undesirable effect caused by the PLL [22]. Among them, the resistance-emulating control (REC) emerges as a promising way for the grid-connected converters [22], [23], [24], [25], which is characterized by easy-to-implement and clear physical insight. The basic idea of the REC is to make the VSR imitate the external characteristics of the resistor, where the value is regulated by the outer loop. According to the passive circuit theory, the current caused by the interaction between the ac grid and the resistor is synchronized with the ac grid [22]. As a result, the synchronization of the grid current is realized naturally under the REC, which thus abolishes the PLL.
At present, the REC has shown great potentials in many applications [22], [23], [24], [25], [26], [27], [28], [29]. In the earlier time, the REC was mostly used in the grid-connected VSRs [22], [23], [24], [25]. To improve the power factor under the REC, an extremum-seeking-based power factor compensator was presented in [26]. Furthermore, following the same idea of the passive circuit emulation, the REC was extended to applications of active power decoupling [27] and three-phase unbalanced grid voltages [28] with introducing some unique concepts (e.g., the harmonic impedance, common-mode, and differential-mode resistances). In the latest work [29], a negative resistance stabilized control was proposed to tackle the instability of the REC for the grid-connected inverter. All these research works validate the effectiveness of the REC for grid-connected converters. However, to the best knowledge of the authors, the small-signal stability of the VSR systems using the REC has not been studied before. Moreover, there is no comprehensively comparative analysis about the frequency-domain characteristics and the stability of the grid-connected VSRs with REC and DCC. Therefore, this article aims to fill this void.
The main contributions of this article are summarized as follows.
1) The dq-frame admittance model for the VSR with REC is established, and the admittance characteristics of the VSR with REC and DCC are compared and analyzed.
2) The influence of the SCR and the voltage-loop bandwidth on the stability of grid-connected VSRs with REC and DCC is studied. From the system stability viewpoint, the REC is shown to be more preferable than the DCC in a weak grid or high voltage-loop bandwidth.
The rest of this article is organized as follows: In Section II, the concept and the control scheme of resistance-emulating technique are elaborated. Section III is devoted to deriving the dq-frame small signal admittance of the VSR with REC. The admittance characteristics of the grid-connected VSR with REC and DCC is verified and compared in Section IV. Section V gives the comparisons of the stability analyses of the system with REC and DCC. Finally, in Section VI, the results are verified by experiments.

II. CONCEPT OF REC
where the superscript "s" is used to express the complex vector in the stationary αβ-frame, e.g., v s Based on (1), the equivalent schematic diagram of the threephase VSR with REC is drawn as Fig. 2. The equivalent resistance r e is regulated by a dc voltage controller. Then, r e i α  and r e i β are taken as the voltage reference of the rectifier. It is emphasized that the grid current will self-synchronize with the grid because the current through any branch of a linear passive circuit will synchronize with the excitation voltage.
In the REC scheme, the ac current control loop and the PLL are eliminated. Besides, only two ac current sensors and one dc voltage sensor are used. Therefore, this control scheme is easy-to-implement and low-cost, which makes it suitable for practical application.

A. Modeling Conventions
In this article, we use boldface letters to express complex space vectors. For example, E = E d + jE q , v = v d + jv q and i = i d + ji q are the point of common coupling (PCC) voltage vector, converter voltage vector, and inductor current vector, respectively. The grid impedance and the converter input admittance are denoted as Z g (s) = Z gd (s) + jZ gq (s) and Y(s) = Y d (s) + jY q (s), respectively.
Let italic letters represent real space vectors. For instance, v = [v d , v q ] T and i = [i d , i q ] T for voltage and current, respectively. The relation between v and i can be described as Notably, E 0 , i 0 d , and i 0 q are denoted as the steady-state value of PCC voltage, input current in d axis and q axis, respectively.
In our derivation, physical quantities such as voltage and current are expressed in grid dq frame, which is based where ω g is the angular synchronous frequency and ω g = 100π rad/s. The converter dq frame is based on θ, which would be consistent with the grid dq frame at steady state. In Fig. 1, L g , L f , C, R g , and R L are the grid inductance, filter inductance, dc side capacitance, grid resistance, and dc load, respectively. The direct-voltage controller has two inputs for the measured dc-link voltage v dc and the reference voltage v ref dc , one output for emulated resistance R e . The superscripts "s" and "c" are used to express vectors in the stationary αβ frame and the converter dq frame, respectively.

B. AC Loop Modeling
The dynamic differential equation of ac loop in converter dq frame can be written as Transforming (4) into frequency domain, whose small-signal form is written as The reference voltage to the PWM is Rewriting (6) in the converter dq frame yields The linearized form of (7) is where R e is the steady-state operating point of the emulated resistance r e and i c 0 = i 0 d + ji 0 q . Considering the zero-order hold effect and calculation delay, it is obtained that where T s is the switching period and T d is the dead time of the PWM switching. Substituting (8) and (9) into (5), the ac loop model can be derived as (10) Then, (10) can be written in matrix form as follows: where

C. DC Loop Modeling
The instantaneous active power flowing into the converter can be described as where Re{·} represents the real part of a complex number. Substituting (4) into (14) yields Linearizing (15) gives Assume that the power losses on the switches of the rectifier are neglectable, the dc-link voltage dynamic is obtained as The small-signal form of (17) is Combining (16) with (18), then we obtain where With the emulated resistance r e as the controller output, the dc-link voltage controller is described as follows: The small-signal form of (22) is Substituting (24) into (11) to get

D. Closed-Loop Admittance Modeling
Substituting (24) into (11) to eliminate Δr e , we have where From (25), the dq-frame input admittance of the VSR with REC can be calculated as (34) Eqn. (35-38) shown at the bottom of this page: Then Y dd , Y qd , Y dq , and Y qq can be solved, whose detailed expression is given in (35)-(38), shown at the bottom of this page.
For comparisons, the DCC shown in Fig. 3 is also considered. The VSR admittance model with DCC is developed as where y i1 , y i2 , y i3 , y i4 , g c1 , g c1 , G d dc and G q dc are given in appendix B. The principles of controllers design for REC and DCC are presented in appendix A.

A. Frequency Scan Validation
The input-admittance models of the VSR using REC and DCC are validated by the point-by-point frequency scanning in MATLAB/Simulink. The parameters of the VSR are shown in Tables I and II. The principles of controller design are elaborated in [10]. The measurement objects are four unknown admittance elements (Y dd , Y dq , Y qd , Y qq ). The amplitude of the voltage perturbation is 0.02 p.u. and the harmonic frequency is set at 10-1000 Hz with an interval of 1-100 Hz. The perturbation is small enough to maintain the system in steady state but large enough for the system admittance identification. The admittance measurement results are drawn in Figs. 4 and 5. The black solid lines show the established admittance models of the grid-connected rectifier with REC and DCC. The red marks represent the admittance measurement results. As observed, the admittance measurement results are in good agreement with the established admittance models, which validates the accuracy of the built admittance models.

B. Comparative Results of Admittance Characteristics
Observing the dq-frame admittance characteristics shown in Figs. 4 and 5, some observations are given as follows: 1) The amplitude of Y dd of REC is lower than Y dd of DCC, which indicates that the REC shows a better voltage disturbance suppression capability.
2) In the low-frequency regions, the negative resistor effect is identified in both Y (s) and Y DCC (s), which tends to cause small-signal instability.
3) Compared with Y DCC (s), the Y (s) has a narrower negativeresistor frequency regions. Therefore, the REC is more preferable in terms of stability.

V. STABILITY ANALYSIS AND COMPARISON
In this section, the stability of grid-connected VSR with REC and DCC are carried out and compared. The system stability is identified by applying the Nyquist criterion to Y (s)Z(s). Fig. 6 shows the small-signal description of a VSR connected with a grid. The VSR is modeled in Norton representation as a current source in parallel with an admittance Y (s). The grid is modeled in a voltage source v g (s) in series with a grid impedance Z g (s), whose equation is given as follows: The relationship between voltage source and input current can be described as where the grid voltage Δv g (s) is stable and Y (s)Δv g (s) − Δi c (s) is also stable for properly designed converters. Therefore, whether the system is stable depends on (I + Y (s)Z g (s)) −1 . Since the system is presented by a multiinput multi-output (MIMO) transfer matrix, the Generalized Nyquist Criterion can be applied [30]. Stability can be examined by checking the eigen loci of the eigenvalues λ 1 (s) and λ 2 (s) of open-loop gain Y (s)Z g (s). If the eigen loci do not encircle (-1, j0), then the system is stable.
The fairness of the comparison between REC and DCC is guaranteed by analyzing them under a equal voltage loop bandwidth and circuit parameters. The amplitude frequency characteristic diagram of REC and DCC is shown in Fig. 7, which indicates that the voltage loop control bandwidth of REC and DCC are equal. For the comparison purpose, the following cases are studied.

A. Effect of Grid Inductance
The first case study tests the system stability with different grid inductances, which determine the grid strength. Four different grid inductances for each method are tested to analyze the impact of the grid inductance: L g1 = 6 mH, L g2 = 9 mH, L g3 = 12 mH, L g4 = 15 mH. Fig. 8 shows the Nyquist plots of the impedance ratios Y (s)Z g (s) of REC and DCC with different values of grid inductance. For a VSR with DCC, increasing grid inductance makes the Nyquist curves more easily encircle the critical point (-1, j0), the stability is therefore reduced. When L g ≥ 12 mH, the Nyquist plots encircle (-1, j0) and the system becomes unstable, which is shown in Fig. 8(a).
For a VSR using REC, when L g changes from 6 to 15 mH, the Nyquist curves move toward to the left half plane but do not encircle (-1, j0) from the Nyquist diagram in Fig. 8(b).
Though the increase of grid inductance makes the system unstable with both control methods, when L g increases to 12 mH the system with DCC becomes unstable while the system with REC keeps still stable. Therefore, the system with REC has better adaptability to weak grid.
To compare the effect of REC and DCC on the system stability under weak grid conditions intuitively, Fig. 9 shows the stable boundaries of R g and L g for both control, where the points right below the stable boundary are stable. Clearly, the stability domain of the REC is wider than the DCC.

B. Effect of Voltage Loop Bandwidth
This case is performed to study the impact of the dc voltage loop bandwidth. The comparison is carried out when both of the circuit parameters are equal. Four different voltage loop bandwidth values are tested for each method: ω d1 = 500 rad/s, ω d2 = 654 rad/s, ω d3 = 781 rad/s, ω d4 = 900 rad/s.   (-1, j0). The instability happens when ω d ≥ 781 rad/s, as shown in Fig. 10(a).
For a VSR using REC, when ω d changes from 500 rd/s to 900 rd/s, the Nyquist curves move toward o the left plane but do not encircle (-1, j0) from the Nyquist diagram in Fig. 10(b).
The increase of voltage loop bandwidth makes the system unstable with both control methods. Nevertheless, the Nyquist curves of DCC encircle the critical point (-1, j0) more easily with the increase of ω d . Therefore, the rectifier with REC is more stable with high voltage loop bandwidth.

C. Effect of Output Power
In this case study, the effect of the output power P on system stability is studied. Four different output power values are tested to analyze the impact of P : P 1 = 4.2 kW, P 2 = 3.0 kW, P 3 = 2.3 kW, P 4 = 1.9 kW. Fig. 11 shows the Nyquist plots of the impedance ratios Y (s)Z g (s) of REC and DCC with different values of the output  power. For a VSR with DCC, reducing P makes the Nyquist curves move away from the left plane in Fig. 11(a).
For a VSR with REC, reducing P makes the Nyquist curves move toward to the left plane to encircle the critical point (-1, j0). When P = 2.3 kW, the system is unstable, as shown in Fig. 11(b). Reducing P helps to stabilize the VSR with DCC. Conversely, increasing P helps to stabilize the VSR with REC. Therefore, the VSR with REC is more preferable for heavy-load condition, while the VSR with DCC is more applicable for light-load condition.

VI. EXPERIMENTAL RESULTS
In this section, the stability analysis and the advantages of REC are validated by experiments based on a two-level threephase PWM rectifier built in the laboratory, as shown in Fig. 12. The controller board is mainly composed of a floating-point DSP (TMS320F28335) and a field-programmable gate array (FPGA EP2C8J144C8N). The DSP is used to accomplish the control process and output duty ratios to the FPGA. And the FPGA is used to achieve the outputs switching driving signals. The related experimental specifications are provided in Tables I and II. Fig. 13 shows the experimental waveforms of input currents i abc and dc-link voltage v dc under stable operating conditions to observe the dynamic response of the VSR with REC. The dynamic response of REC method is shown in Fig. 13(a). From Fig. 13(a), we can obtain that the rise time of the system with REC is about 6 ms and the over shoot is 3.8%. Fig. 13(b) shows the transient process when the dc-link voltage reference rises from 600 to 650 V suddenly. It can be observed that the whole transient process can be completed within 6 ms. The   input current remains sinusoidal and the dc-link voltage tracks its reference at steady state. Therefore, the proposed REC can achieve a satisfying dynamic response.
The lagging and leading power factor results for the VSR with REC with the emulated fundamental frequency steady-state inductance proposed in [27] are presented in Fig. 14. Fig. 14(a) shows the experimental results with emulated inductance L e = 1 mH (L g + L f = 4 mH), the lagging power factor is 0.9784. In Fig. 14(b), the experimental results show that the leading power factor is 0.9833 with emulated inductance L e = -8 mH (L g + L f = 4 mH). The experimental results verify that the control strategy is effective with both inductive reactive power and capacitive reactive power.
Next, the comparative experiments between REC and DCC in weak grid are carried out. For the VSR with DCC, a stable response is observed in Fig. 15(a) when L g = 9 mH, while an unstable response is observed in Fig. 15(b) when L g = 12 mH. The experimental results agree with the stability analysis in Fig. 8(a). Fig. 16 depicts the experimental waveforms for the REC. When L g is 9 or 12 mH, the system can keep stable, which conforms to the stability analysis in Fig. 8(b). The above experimental results demonstrate that the REC significantly extends the stability regions of the grid-connected VSR compared with DCC.
The experimental waveforms under different voltage-loop bandwidth are shown in Fig. 17. Fig. 17(a) shows the step change of the dc-link voltage loop bandwidth from 654 rd/s to 781 rd/s with DCC. The system becomes unstable at ω d =781 rd/s, which conforms to the stability analysis in Fig. 10(a). Fig. 17(b) shows the step change of the dc-link voltage loop bandwidth from 654 rd/s to 781 rd/s with REC. When ω d changes to 781 rd/s, the system keeps stable, which verifies the stability analysis in Fig. 10(b). The above experimental results demonstrate that the REC has better adaptability to high voltage-loop bandwidth.
The impact of the output power P on the system stability is verified by experiments. The VSR with DCC keeps stable when P = 2.3 kW as shown in Fig. 18(a), which agrees with the stability analysis in Fig. 11(a). For the VSR with REC, when P = 2.3 kW, the system becomes unstable as shown in Fig. 18(b), which conforms to the stability analysis in Fig. 11(b). The above experimental results demonstrate that the VSR with DCC is more suitable for light-load operation than the VSR with REC.
The computational effort of the proposed REC and the DCC is measured based on DSP TMS320F28335, and the measured results are 8.57 and 24.18 μs, respectively. The measured execution time of each link of REC and DCC is shown in Fig. 19. It is found that the execution time required by the proposed REC is lower than DCC, verifying the superiority of the REC in the computational effort. Table III summarizes the comparative results between the traditional controllers and the proposed REC. Both DCC and direct power control (DPC) [6] require grid voltage sensors and PLL to achieve grid synchronization. But REC in [29] and REC in our manuscript can achieve control objects without   grid voltage sensors and PLL. From the perspective of system stability, the VSR with REC can operate stably under weaker grids or higher voltage bandwidth, which reflects that the VSR with REC has a wider stability region compared to DCC and DPC. As for REC in [29], the effect of grid inductance and voltage bandwidth on stability are not analyzed and proved. Moreover, the control algorithms of DCC, DPC, REC in [29] are more complicated than that of REC, thereby, leading to a higher computational cost.

VII. CONCLUSION
In this article, the dq-frame admittance model of the gridconnected VSR with REC was proposed. By using the dq-frame admittance-based approach, the stability comparison between REC and DCC was carried out. The influences of the SCR and the bandwidth of the dc-link voltage loop on the grid-VSR system stability were discussed and compared. The conclusions are drawn as follows.
1). The application of REC significantly enlarges the stability regions of VSR under weak grid conditions. From the perspective of system stability, The REC is more preferable to DCC in a weak grid. 2). The bandwidth of dc-link voltage controller is the key factor to impact the system stability. The grid-connected VSR with the REC has better adaptability to high voltageloop bandwidth. 3). The grid-connected VSR with REC has better flexibility to the high output power while poorer flexibility to the low output power.

1) DC Control Loop of REC:
In the direct-voltage controller loop, a PI voltage controller is employed According to the linearized dc-link voltage dynamic equation, the transfer function from Δr e to Δv dc can be derived as dc R e )) + (1/R L ). Then, the open loop transfer function of voltage loop of REC can be described as The open-loop amplitude-frequency characteristics can be calculated by substituting s = jω into (A3) The open-loop amplitude-frequency characteristics G(jω d ) can also be expressed as G (jω d ) = r cos θ + jr sin θ (A5) where r = |G(jω d )| = 1, θ = γ − 180 • and γ is the phase margin. Based on A(4) and A(5), k pd and k id can be solved as (A6)

2) AC Control Loop of DCC:
In the ac control loop, a PI current controller eliminating the dq cross coupling with PCC voltage feedforward is designed as where G v1 and G v2 are first-order low-pass feedforward filter of current sampling and PCC voltage sampling, respectively.
According to [10], k pa = ω ci L, ω ci is the bandwidth of current loop and ω ci = 0.05ω sw , where ω sw is the angular switching frequency. And a small k ia is employed to remove the steady-state impact of mismatch between actual and model inductances.

3) DC Control Loop of DCC:
In the direct-voltage control loop, a PI voltage controller is employed The open-loop amplitude frequency characteristics can be calculated by substituting s = jω into (A9) Same as before, k pd and k id can be solved as (A11)

4) Synchronization Loop (PLL) of DCC:
In the synchronization loop, a PI controller is designed to output the instantaneous frequency deviation