TY - JOUR
T1 - Closed-loop waveform control of boost inverter
AU - Zhu, Guo Rong
AU - Xiao, Cheng Yuan
AU - Wang, Haoran
AU - Tan, Siew Chong
PY - 2016/7
Y1 - 2016/7
N2 - The input current of single-phase inverter typically has an AC ripple component at twice the output frequency, which causes a reduction in both the operating lifetime of its DC source and the efficiency of the system. In this paper, the closed-loop performance of a proposed waveform control method to eliminate such a ripple current in boost inverter is investigated. The small-signal stability and the dynamic characteristic of the inverter system for input voltage or wide range load variations under the closed-loop waveform control method are studied. It is validated that with the closedloop waveform control, not only was stability achieved, the reference voltage of the boost inverter capacitors can be instantaneously adjusted to match the new load, thereby achieving improved ripple mitigation for a wide load range. Furthermore, with the control and feedback mechanism, there is minimal level of ripple component at the DC bus during steady state, and the transient response is rapid with negligible effect on the output voltage. Analysis, simulation and experimental results are presented to support the investigation.
AB - The input current of single-phase inverter typically has an AC ripple component at twice the output frequency, which causes a reduction in both the operating lifetime of its DC source and the efficiency of the system. In this paper, the closed-loop performance of a proposed waveform control method to eliminate such a ripple current in boost inverter is investigated. The small-signal stability and the dynamic characteristic of the inverter system for input voltage or wide range load variations under the closed-loop waveform control method are studied. It is validated that with the closedloop waveform control, not only was stability achieved, the reference voltage of the boost inverter capacitors can be instantaneously adjusted to match the new load, thereby achieving improved ripple mitigation for a wide load range. Furthermore, with the control and feedback mechanism, there is minimal level of ripple component at the DC bus during steady state, and the transient response is rapid with negligible effect on the output voltage. Analysis, simulation and experimental results are presented to support the investigation.
UR - http://www.scopus.com/inward/record.url?scp=84979217608&partnerID=8YFLogxK
U2 - 10.1049/iet-pel.2015.0603
DO - 10.1049/iet-pel.2015.0603
M3 - Journal article
AN - SCOPUS:84979217608
SN - 1755-4535
VL - 9
SP - 1808
EP - 1818
JO - IET Power Electronics
JF - IET Power Electronics
IS - 9
ER -