Abstract
In this work, Verilog is used as hardware description language for implementation of traffic light controller. It shows Red, Green and Yellow color at a predefined interval. Technology scaling is used as energy efficient technique. We have used 90nm, 65nm, 40nm and 28nm technology based FPGA and then we have analyzed power consumption for traffic light controller on different FPGA. Leakage power is in range of 97.5-99% of total power consumption by traffic light controller on Virtex-7 FPGA. Signal power, clock power and IOs power are almost negligible. Power dissipation is measured on XPOWER simulator.
Original language | English |
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Journal | Gyancity Journal of Engineering and Technology |
Volume | 3 |
Issue number | 2 |
Pages (from-to) | 9-16 |
Number of pages | 8 |
ISSN | 2456-0065 |
Publication status | Published - Jul 2017 |
Keywords
- Traffic Light Controller
- FPGA
- Verilog
- Energy Efficient Design