TY - GEN
T1 - Parallel Interleaved VSCs: Influence of the PWM Scheme on the Design of the Coupled Inductor
AU - Gohil, Ghanshyamsinh Vijaysinh
AU - Bede, Lorand
AU - Maheshwari, Ram Krishan
AU - Teodorescu, Remus
AU - Kerekes, Tamas
AU - Blaabjerg, Frede
PY - 2014/11
Y1 - 2014/11
N2 - The line current ripple and the size of the dc-link capacitor can be reduced by interleaving the carriers of the parallel connected Voltage Source Converters (VSCs). However, the interleaving of the carriers gives rise to the circulating current between the VSCs, and it should be suppressed. To limit the circulating current, magnetic coupling between the interleaved legs of the corresponding phase is provided by means of a Coupled Inductor (CI). The design of the CI is strongly influenced by the Pulsewidth Modulation (PWM) scheme used. The analytical model to evaluate the flux-linkage in the CI is presented in this paper. The maximum flux density and the core losses, being the most important parameters for the CI design, are evaluated for continuous PWM and discontinuous pulsewidth modulation (DPWM) schemes. The effect of these PWM schemes on the design of the CI is discussed. The simulation and the experimental results are finally presented to validate the analysis.
AB - The line current ripple and the size of the dc-link capacitor can be reduced by interleaving the carriers of the parallel connected Voltage Source Converters (VSCs). However, the interleaving of the carriers gives rise to the circulating current between the VSCs, and it should be suppressed. To limit the circulating current, magnetic coupling between the interleaved legs of the corresponding phase is provided by means of a Coupled Inductor (CI). The design of the CI is strongly influenced by the Pulsewidth Modulation (PWM) scheme used. The analytical model to evaluate the flux-linkage in the CI is presented in this paper. The maximum flux density and the core losses, being the most important parameters for the CI design, are evaluated for continuous PWM and discontinuous pulsewidth modulation (DPWM) schemes. The effect of these PWM schemes on the design of the CI is discussed. The simulation and the experimental results are finally presented to validate the analysis.
KW - Voltage source converters (VSC)
KW - Parallel
KW - Interleaving
KW - Coupled inductor
KW - PWM
KW - Parallel inverters
KW - parallel interleaved inverters
KW - parallel interleaved converters
KW - High power converters
KW - Modulation scheme
KW - Phase-shifted carrier-based pulsewidth modulation (PSC-PWM)
KW - circulating current
KW - circulating current suppression
KW - common mode circulating current
KW - common-mode inductor
KW - circulating current control
KW - inter phase transformer
KW - inter cell transformer
KW - Flux linkage
U2 - 10.1109/IECON.2014.7048730
DO - 10.1109/IECON.2014.7048730
M3 - Article in proceeding
SN - 978-1-4799-4032-5
T3 - Proceedings of the Annual Conference of the IEEE Industrial Electronics Society
SP - 1693
EP - 1699
BT - Proceedings of the 40th Annual Conference of the IEEE Industrial Electronics Society, IECON 2014
PB - IEEE Press
T2 - 40th Annual Conference of IEEE Industrial Electronics Society
Y2 - 29 October 2014 through 1 November 2014
ER -