Virtual impedance loop for droop-controlled single-phase parallel inverters using a second-order general-integrator scheme

José Matas*, M. Castilla, Luis García De Vicuña, Jaume Miret, Juan Carlos Vasquez

*Corresponding author

Research output: Contribution to journalJournal articleResearchpeer-review

187 Citations (Scopus)

Abstract

This paper explores the impact of the output impedance on the active and reactive power flows between parallelized inverters operating with the droop method. In these systems, a virtual output impedance is usually added to the control loop of each inverter to improve the reactive power sharing, regardless of line-impedance unbalances and the sharing of nonlinear loads. The virtual impedance is usually implemented as the time derivative of the inverter output current, which makes the system highly sensitive to the output current noise and to nonlinear loads with high slew rate. To solve this, a second-order general-integrator (SOGI) scheme is proposed to implement the virtual impedance, which is less sensitive to the output current noise, avoids to perform the time derivative function, achieves better output-voltage total harmonic distortion, and enhances the sharing of nonlinear loads. Experimental results with two 2-kVA inverter systems under linear and nonlinear loads are provided to validate this approach.
Original languageEnglish
Article number5590301
JournalIEEE Transactions on Power Electronics
Volume25
Issue number12
Pages (from-to)2993-3002
Number of pages10
ISSN0885-8993
DOIs
Publication statusPublished - 1 Dec 2010
Externally publishedYes

Keywords

  • Distributed generation (DG)
  • droop control method
  • nonlinear loads
  • parallel inverters
  • second-order general integrators (SOGIs)
  • virtual output impedance

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