10kV SiC MOSFET split output power module

Research output: Contribution to book/anthology/report/conference proceedingArticle in proceedingResearchpeer-review

3 Citations (Scopus)

Abstract

The poor body diode performance of the first generation of 10kV SiC MOSFETs and the parasitic turn-on phenomenon limit the performance of SiC based converters. Both these problems can potentially be mitigated using a split output topology. In this paper we present a comparison between a classical half bridge and a split-output power module. It is found that the peak current during turn-on is reduced significantly, however some additional challenges arise during implementation.
Original languageEnglish
Title of host publicationProceedings of the 2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe)
Number of pages7
PublisherIEEE Press
Publication dateSep 2015
Pages1-7
DOIs
Publication statusPublished - Sep 2015
Event17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015 - Centre International de Conférence Genève (CICG), 17 rue Varembé CH . 1211 Genève 20, Geneva, Switzerland
Duration: 8 Sep 201510 Sep 2015

Conference

Conference17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015
LocationCentre International de Conférence Genève (CICG), 17 rue Varembé CH . 1211 Genève 20
CountrySwitzerland
CityGeneva
Period08/09/201510/09/2015

Keywords

  • power MOSFET
  • Silicon compounds
  • Wide band gap semiconductors
  • MOSFET split output power module
  • Parasitic turn-on phenomenon
  • Peak current
  • Poor body diode performance
  • Voltage 10 kV

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