Abstract
The poor body diode performance of the first generation of 10kV SiC MOSFETs and the parasitic turn-on phenomenon limit the performance of SiC based converters. Both these problems can potentially be mitigated using a split output topology. In this paper we present a comparison between a classical half bridge and a split-output power module. It is found that the peak current during turn-on is reduced significantly, however some additional challenges arise during implementation.
Original language | English |
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Title of host publication | Proceedings of the 2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe) |
Number of pages | 7 |
Publisher | IEEE Press |
Publication date | Sept 2015 |
Pages | 1-7 |
DOIs | |
Publication status | Published - Sept 2015 |
Event | 17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015 - Centre International de Conférence Genève (CICG), 17 rue Varembé CH . 1211 Genève 20, Geneva, Switzerland Duration: 8 Sept 2015 → 10 Sept 2015 |
Conference
Conference | 17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015 |
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Location | Centre International de Conférence Genève (CICG), 17 rue Varembé CH . 1211 Genève 20 |
Country/Territory | Switzerland |
City | Geneva |
Period | 08/09/2015 → 10/09/2015 |
Keywords
- power MOSFET
- Silicon compounds
- Wide band gap semiconductors
- MOSFET split output power module
- Parasitic turn-on phenomenon
- Peak current
- Poor body diode performance
- Voltage 10 kV