HVDC Grid Fault Current Limiting Method Through Topology Optimization Based on Genetic Algorithm

Yan Tao, Baohong Li, Tomislav Dragičević, Tianqi Liu, Frede Blaabjerg

Research output: Contribution to journalJournal articleResearchpeer-review

15 Citations (Scopus)
58 Downloads (Pure)

Abstract

Limiting fault current level of high-voltage direct current (HVDC) grid is conducive to reduce the cost of current limiting devices and to relieve the stringent time constraints on protection, but the main concentrations are focused on pole-to-pole fault, while few attentions have been paid to pole-to-ground fault, especially in symmetrical mono-pole dc grid. This article proposes a pole-to-ground fault current limiting method through topology optimization, which is implemented in three steps. The influence factors of pole-to-ground fault current in symmetrical mono-pole HVDC grid are clarified in the first step, which is based on the detailed state space model of dc grid. And the fact that the topology of dc grid influences fault current a lot is confirmed. In the second step, a simplified index is proposed based on the above theoretical analysis, thus the fault current level of each topology can be estimated in a simple and efficient way. At last, to limit the pole-to-ground fault current level, the genetic algorithm is used to optimize the dc grid topology. The optimization results of studied cases indicate that the mesh structure or ring structure is recommendable for dc grid in term of fault current limiting.
Original languageEnglish
Article number9204725
JournalI E E E Journal of Emerging and Selected Topics in Power Electronics
Volume9
Issue number6
Pages (from-to)7045 - 7055
Number of pages11
ISSN2168-6777
DOIs
Publication statusPublished - Dec 2021

Keywords

  • Fault current limitation
  • genetic algorithm
  • high-voltage direct current (HVDC) grid
  • pole-to-ground fault current
  • topology optimization

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