Abstract
Neural networks based on reconfigurable photonic integrated chips (RPICs) can offer zero-latency processing, marginal power consumption and operational flexibility. On the other hand, they are subject to, performance affecting, operational/fabrication deviations in their building blocks. Here, we present a Bayesian learning framework that when combined with device characterization, can dramatically decrease power consumption beyond 74% and significantly simplify the driving circuitry.
Originalsprog | Engelsk |
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Titel | 2022 IEEE Workshop on Complexity in Engineering, COMPENG 2022 |
Forlag | IEEE Signal Processing Society |
Publikationsdato | 2022 |
ISBN (Elektronisk) | 9781728171241 |
DOI | |
Status | Udgivet - 2022 |
Begivenhed | 2022 IEEE Workshop on Complexity in Engineering, COMPENG 2022 - Florence, Italien Varighed: 18 jul. 2022 → 20 jul. 2022 |
Konference
Konference | 2022 IEEE Workshop on Complexity in Engineering, COMPENG 2022 |
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Land/Område | Italien |
By | Florence |
Periode | 18/07/2022 → 20/07/2022 |
Navn | 2022 IEEE Workshop on Complexity in Engineering, COMPENG 2022 |
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Bibliografisk note
Funding Information:This work has received funding from the EU H2020 NEoteRIC project under grant agreement 871330.
Publisher Copyright:
© 2022 IEEE.