Impact of Short‐circuit Events on Lifetime Expectancy of SiC MOSFETs

Future electrification demands drastic improvements in power electronics by enhancing power density and efficiency, without negative impact on reliability and lifetime for the industry and transport sectors like automotive, rail, aeronautic, and electric grids. SiC MOSFETs' specific failure-mechanism understanding and lack of adapted tests covering application mission profiles are hindering their application. Design rules taking into account stressor effects (safety margins) and predicting lifetime are necessary.
A reliable operation level of the power device must be guaranteed, especially in extreme operation. SiC MOSFETs present a significantly higher current density (A/cm2) compared to Si (IGBT) counterparts. Thereby, the strong channel polarization imposes a high short-circuit current that generates high temperatures. Compared to Si devices, this effect is much more pronounced for SiC and could finally lead to total device failure. On the other hand, the number of bond wires per area unit used for power module manufacturing cannot be increased by the same amount, ending up in a systematic overcurrent through them.
Accelerated tests and a lot of work have been already done on this topic. Thus, it is well-known that degradation mechanisms occur on SiC MOSFETs caused by short-circuit events. The main motivation of this project is to measure quantitatively the impact of short-circuit events on the expected life. The study will be performed on selected part numbers from first SiC manufacturers.