Submodule Capacitance Monitoring Strategy for Phase-Shifted Carrier Pulse-Width Modulation Based Modular Multilevel Converters

Capacitance monitoring is one of the important issues for a modular multilevel converter (MMC) to obtain high reliability. Since pulsewidth modulation is usually implemented in the field-programmable gate array (FPGA), produced precise switching states in the FPGA cannot be directly accessed by the top digital signal processor (DSP) controller, which poses challenges to the existing capacitance monitoring methods based on precise switching states of the MMC. This article presents a submodule (SM) capacitance monitoring strategy for the MMC with a simple algorithm, where the fundamental frequency components of the SM capacitor voltage and current are extracted to estimate the SM capacitance based on reference, but not the precise switching states. The proposed scheme not only simplifies the implementation and calculation, but also avoids control limitations and heavy communication burden between the DSP and the FPGA. Besides, the proposed strategy effectively eliminates noise impact from sensors and increases accuracy. Simulation and experimental studies are implemented, and the results confirm the effectiveness of the proposed strategy.