Capacitive parasitic couplings in power electronics systems are gaining increased attention due to the emergence of the wide bandgap devices, with the main challenges being faster switching speeds and increased operating voltage capabilities causing increased voltage slew rate (dv/dt). The high dv/dt induces capacitive displacement currents through the channel of the power semiconductor devices, effectively reducing the switching speed, resulting in an increase in the Volt-Ampere integral, incurring surplus switching energy dissipation. This paper highlights that the parasitic power module gate high side capacitance should be analyzed in parallel to the high-side gate-drain capacitance and thus contributing to the “equivalent” high-side Miller capacitance, slowing down the switching speed of the high-side device compared to the low-side device in the half-bridge power module. Effectively this causes an imbalance in switching energy dissipation between high-side and low-side devices. A combined physics based and behavioural based digital twin simulation is used to evaluate high-side and low-side switching energy dissipation through double pulse testing. Simulations identify a significant increase in turn-on energy on the high-side device compared to the low side device, due to the equivalent high-side Miller capacitance increase. Possible reasons for why such significant deviation in switching energy dissipation between the high-side and low-side devices is unprecedented, are shared from the authors perspectives.
|China International Electrical and Energy Conference (CIEEC)
|12/05/2023 → 14/05/2023